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rt2805a ? ds2805a-00 november 2012 www.richtek.com 1 copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. ? ordering information note : richtek products are : ` rohs compliant and compatible with the current require- ments of ipc/jedec j-std-020. ` suitable for use in snpb or pb-free soldering processes. applications z distributive power systems z battery charger z dsl modems z pre-regulator for linear regulators 5a, 36v, 500khz current mode asynchronous step-down converter general description the rt2805a is a current mode asynchronous step-down converter that achieves excellent load and line regulation. over a wide input voltage range from 5.5v to 36v and supports output current up to 5a. the current mode operation provides fast transient response and eases loop stabilization. an adjustable soft-start reduces the stress on the input source at startup. in shutdown mode, the regulator draws only 25 a of supply current. the rt2805a requires a minimum number of readily available external components, providing a compact solution. the rt2805a provides protection functions inducing input under voltage lockout, cycle-by-cycle current limit, short circuit protection and thermal shutdown protection. the rt2805a is available in the sop-8 (exposed pad) package. features z z z z z 5a output current z z z z z wide operating input range 5.5v to 36v z z z z z adjustable output voltage from 1.222v to 26v z z z z z high efficiency up to 90% z z z z z internal compensation minimizes external parts count z z z z z internal soft-start z z z z z 110m internal power mosfet switch z z z z z 25 a shutdown mode z z z z z fixed 500khz frequency z z z z z thermal shutdown z z z z z cycle-by-cycle current limit z z z z z available in an sop8 (exposed pad) package z z z z z rohs compliant and halogen free vin en gnd boot fb sw l1 r1 r2 v out chip enable v in rt2805a d1 c boot c out c in marking information rt2805agsp : product number ymdnn : date code rt2805a gspymdnn simplified application circuit package type sp : sop-8 (exposed pad-option 2) rt2805a lead plating system g : green (halogen free and pb free)
rt2805a 2 ds2805a-00 november 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. functional pin description function block diagram pin no. pin name pin function 1 boot bootstrap input for high side gate driver. connect a 10nf or greater capacitor from sw to boot to power the high side switch. 2, 3 nc no internal connection. 4 fb feedback input. the feedback threshold is 1.222v. 5 en enable input. en is a digital input that turns the regulator on or off. drive en higher than 1.4v to turn on the regulator, lower than 0.4v to turn it off. for automatic startup, leave en unconnected. 6, 9 (exposed pad) gnd ground. the exposed pad must be soldered to a large pcb and connected to gnd for maximum power dissipation. 7 vin power input. a suitable large capacitor should be connected from the vin to gnd to eliminate noise on the input to the ic. 8 sw switch node. note that a capacitor is required from sw to boot to power the high side switch. pin configurations (top view) sop-8 (exposed pad) sw boot nc fb nc en vin gnd 2 3 4 5 8 7 6 gnd 9 s q r driver bootstrap control - + current sense amplifier current comparator oscillator 500khz ramp generator regulator reference + - 12k error amplifier 30pf 400k 13pf sw boot fb en vin gnd + -
rt2805a 3 ds2805a-00 november 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. operation the rt2805a is a constant frequency, current mode asynchronous step-down converter. in normal operation, the high side n-mosfet is turned on when the s-r latch is set by the oscillator and is turned off when the current comparator resets the s-r latch. while the n-mosfet is turned off, the inductor current conducts through the external diode. error amplifier the error amplifier adjusts its output voltage by comparing the feedback signal (v fb ) with the internal 1.222v reference. when the load current increases, it causes a drop in the feedback voltage relative to the reference, the error amplifier's output voltage then rises to allow higher inductor current to match the load current. oscillator the internal oscillator runs at fixed frequency 500khz. in short circuit condition, the frequency is reduced to 150khz for low power consumption. internal regulator the regulator provides low voltage power to supply the internal control circuits and the bootstrap power for high side gate driver. enable the converter is turned on when the en pin is higher than 1.4v and turned off when the en pin is lower than 0.4v. when the en pin is open, it will be pulled up to logic-high by 1 a current internally. soft-start (ss) an internal current source charges an internal capacitor to build a soft-start ramp voltage. the fb voltage will track the internal ramp voltage during soft-start interval. the typical soft-start time is 5ms. thermal shutdown the over temperature protection function will shut down the switching operation when the junction temperature exceeds 150 c. once the junction temperature cools down by approximately 30 c, the converter will automatically resume switching.
rt2805a 4 ds2805a-00 november 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. absolute maximum ratings (note 1) z supply voltage, vin ----------------------------------------------------------------------------------------- ? 0.3v to 40v z switching voltage, sw ------------------------------------------------------------------------------------- ? 0.3v to (v in + 0.3v) z boot v oltage ------------------------------------------------------------------------------------------------- (v sw ? 0.3v) to (v sw + 6v) z other pins ------------------------------------------------------------------------------------------------------ ? 0.3v to 6v z power dissipation, p d @ t a = 25 c sop-8 (exposed pad) -------------------------------------------------------------------------------------- 2.04w z package thermal resistance (note 2) sop-8 (exposed pad), ja --------------------------------------------------------------------------------- 49 c/w sop-8 (exposed pad), jc -------------------------------------------------------------------------------- 15 c/w z junction temperature ---------------------------------------------------------------------------------------- 150 c z lead temperature (soldering, 10 sec.) ------------------------------------------------------------------ 260 c z storage temperature range ------------------------------------------------------------------------------- ? 65 c to 150 c z esd susceptibility (note 3) hbm (human body model) --------------------------------------------------------------------------------- 2kv recommended operating conditions (note 4) z supply voltage, vin ----------------------------------------------------------------------------------------- 5.5v to 36v z junction temperature range ------------------------------------------------------------------------------- ? 40 c to 125 c z ambient temperature range ------------------------------------------------------------------------------- ? 40 c to 85 c electrical characteristics parameter symbol test conditions min typ max unit t a = 25c 1.202 1.222 1.239 reference voltage v ref i out = 0a to 5a 1.196 1.222 1.245 v high side switch-on resistance r ds(on)1 bias gate driver at v in = 5.5v -- 110 230 m low side switch-on resistance r ds(on)2 bias gate driver at v in = 5.5v -- 10 15 current limit i lim voltage mode test 6 7.5 9 a oscillator frequency f osc v fb = 0.8v 400 500 600 khz short circuit frequency v fb = 0v -- 150 -- khz maximum duty cycle d max v fb = 0.8v 85 90 95 % minimum on-time t on come from maximum duty cycle -- 100 150 ns under voltage lockout threshold rising v in rising, check switching -- 4.2 5 v under voltage lockout threshold hysteresis v in falling, check switching -- 315 -- mv logic-high v ih let en = 1.4v, check i q 1.4 -- -- en threshold voltage logic-low v il let en = 0.4v, check i q -- -- 0.4 v enable pull up current -- 1 -- a shutdown current i shdn v en = 0v -- 25 45 a quiescent current i q v en = 2v, v fb = 1.5v -- 0.6 1 ma soft-start period 3 5 10 ms thermal shutdown t sd -- 160 -- c (v in = 12v, t a = ? 40 c to 85 c unless otherwise specified)
rt2805a 5 ds2805a-00 november 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. note 1. stresses beyond those listed ? absolute maximum ratings ? may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions may affect device reliability. note 2. ja is measured at t a = 25 c on a high effective thermal conductivity four-layer test board per jedec 51-7. jc is measured at the exposed pad of the package. the evb board copper area is 70mm 2 . note 3. devices are esd sensitive. handling precaution is recommended. note 4. the device is not guaranteed to function outside its operating conditions.
rt2805a 6 ds2805a-00 november 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. typical application circuit table 1. recommended component selection v ou t (v) r1 (k ) r2 (k ) c ff (pf) l ( h) c out ( f) 2.5 100 100 82 6.8 22 x 2 3.3 100 58.6 82 10 22 x 2 5 100 31.6 82 15 22 x 2 8 100 18 82 22 22 x 2 vin en gnd boot fb sw 5 4 7 8 1 l1 10nf 22f x 2 r1 r2 v out 4.7f/ 50v x 2 chip enable v in 5.5v to 36v rt2805a d1 b550a 6, 9 (exposed pad) c boot c out c in open = automatic startup c ff
rt2805a 7 ds2805a-00 november 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. typical operating characteristics frequency vs. temperature 440 450 460 470 480 490 500 510 520 530 540 -50 -25 0 25 50 75 100 125 temperature (c) frequency (khz ) v out = 5v v in = 12v v in = 24v v in = 36v frequency vs. input voltage 440 450 460 470 480 490 500 510 520 530 540 4 8 12 16 20 24 28 32 36 input voltage (v) frequency (khz ) v out = 5v, i out = 0a reference voltage vs. temperature 1.210 1.212 1.214 1.216 1.218 1.220 1.222 1.224 1.226 1.228 1.230 -50 -25 0 25 50 75 100 125 temperature (c) reference voltage (v) i out = 0a v in = 12v v in = 24v v in = 36v output voltage vs. output current 4.960 4.964 4.968 4.972 4.976 4.980 4.984 4.988 4.992 4.996 5.000 5.004 5.008 012345 output current (a) output voltage (v) v out = 5v v in = 36v v in = 24v v in = 12v reference voltage vs. input voltage 1.210 1.214 1.218 1.222 1.226 1.230 4 8 12 16 20 24 28 32 36 input voltage (v) reference voltage (v) v out = 5v, i out = 0a efficiency vs. output current 0 10 20 30 40 50 60 70 80 90 100 012345 output current (a) efficiency (%) v out = 5v v in = 12v v in = 32v v in = 36v
rt2805a 8 ds2805a-00 november 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. current limit vs. temperature 5 6 7 8 9 10 11 12 -50 -25 0 25 50 75 100 125 temperature (c) current limit (a) v in = 12v shutdown current vs. input voltage 0 10 20 30 40 50 60 4 8 12 16 20 24 28 32 36 input voltage (v) shutdown current ( a ) v en = 0v quiescent current vs. temperature 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 -50 -25 0 25 50 75 100 125 temperature (c) quiescent current (ma) v in = 36v v in = 24v v in = 12v load transient response time (100 s/div) v out (200mv/div) i out (2a/div) v in = 12v, v out = 5v, i out = 0.2a to 5a load transient response time (100 s/div) v out (200mv/div) i out (2a/div) v in = 12v, v out = 5v, i out = 2.5a to 5a switching time (1 s/div) v out (10mv/div) i l (5a/div) v in = 12v, v out = 5v, i out = 5a v sw (10v/div)
rt2805a 9 ds2805a-00 november 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. power off from en time (2.5ms/div) v en (5v/div) i l (5a/div) v in = 12v, v out = 5v, i out = 5a v out (5v/div) power on from en time (2.5ms/div) v en (5v/div) i l (5a/div) v in = 12v, v out = 5v, i out = 5a v out (5v/div)
rt2805a 10 ds2805a-00 november 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. application information the rt2805a is an asynchronous high voltage buck converter that can support the input voltage range from 5.5v to 32v and the output current can be up to 5a. output voltage setting the resistive divider allows the fb pin to sense the output voltage as shown in figure 1. figure 1. output voltage setting the output voltage is set by an external resistive divider according to the following equation : out ref r1 v = v 1 r2 ?? + ?? ?? where v ref is the reference voltage (1.222v typ.). where r1 = 100k . external bootstrap diode connect a 10nf low esr ceramic capacitor between the boot pin and sw pin. this capacitor provides the gate driver voltage for the high side mosfet. it is recommended to add an external bootstrap diode between an external 5v and boot pin for efficiency improvement when input voltage is lower than 5.5v or duty ratio is higher than 65% .the bootstrap diode can be a low cost one such as in4148 or bat54. the external 5v can be a 5v fixed input from system or a 5v output of the rt2805a. figure 2. external bootstrap diode soft-start the rt2805a contains an internal soft-start clamp that gradually raises the output voltage. the typical soft-start t ime is 5ms. chip enable operation the en pin is the chip enable input. pull the en pin low (<0.4v) will shutdown the device. during shutdown mode, the rt2805a quiescent current drops to lower than 25 a. drive the en pin to high (>1.4v, <5.5v) will turn on the device again. if the en pin is open, it will be pulled to high by internal circuit. for external timing control (e.g.rc), the en pin can also be externally pulled to high by adding a 100k or greater resistor from the vin pin (see figure 3 ). inductor selection the inductor value and operating frequency determine the ripple current according to a specific input and output voltage. the ripple current i l increases with higher v in and decreases with higher inductance. out out l in vv i = 1 fl v ??? ? ?? ??? ? ??? ? having a lower ripple current reduces not only the esr losses in the output capacitors but also the output voltage ripple. high frequency with small ripple current can achieve highest efficiency operation. however, it requires a large inductor to achieve this goal. for the ripple current selection, the val ue of i l = 0.2(i max ) will be a reasonable starting point. the large st ripple current occurs at the highest v in . to guarantee that the ripple current stays below the specified maximum, the inductor value should be chosen according to the following equation : out out l(max) in(max) vv l = 1 fi v ??? ? ? ??? ? ??? ? the inductor's current rating (caused a 40 c temperature rising from 25 c ambient) should be greater than the maximum load current and its saturation current should be greater than the short circuit peak current limit. please see table 2 for the inductor selection reference. rt2805a gnd fb r1 r2 v out sw boot 5v rt2805a 10nf
rt2805a 11 ds2805a-00 november 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. out in rms out(max) in out v v i = i 1 vv ? out l out 1 viesr 8fc ?? ?? + ?? ?? the output ripple will be highest at the maximum input voltage since i l increases with input voltage. multiple capacitors placed in parallel may be needed to meet the esr and rms current handling requirement. dry tantalum, special polymer, aluminum electrolytic and ceramic capacitors are all available in surface mount packages. special polymer capacitors offer very low esr value. however, it provides lower capacitance density than other types. although tantalum capacitors have the highest capacitance density, it is important to only use types that pass the surge test for use in switching power supplies. aluminum electrolytic capacitors have significantly higher esr. however, it can be used in cost-sensitive applications for ripple current rating and long term reliability considerations. ceramic capacitors have excellent low esr characteristics but can have a high voltage coefficient and audible piezoelectric effects. the high q of ceramic capacitors with trace inductance can also lead to significant ringing. higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. their high ripple current, high voltage rating and low esr make them ideal for switching regulator applications. however, care must be taken when these capacitors are used at input and output. when a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, v in . a sudden inrush of current through the long wires can potentially cause a voltage spike at v in large enough to damage the part. checking transient response the regulator loop response can be checked by looking at the load transient response. switching regulators take several cycles to respond to a step in load current. when a load step occurs, v out immediately shifts by an amount equal to i load (esr) also begins to charge or discharge c out generating a feedback error signal for the regulator to return v out to its steady-state value. during this recovery time, v out can be monitored for overshoot or ringing that would indicate a stability problem. diode selection when the power switch turns off, the path for the current is through the diode connected between the switch output and ground. this forward biased diode must have a minimum voltage drop and recovery times. schottky diode is recommended and it should be able to handle those current. the reverse voltage rating of the diode should be greater than the maximum input voltage, and current rating should be greater than the maximum load current. for more detail please refer to table 4. c in and c out selection the input capacitance, c in, is needed to filter the trapezoidal current at the source of the high side mosfet. to prevent large ripple current, a low esr input capacitor sized for the maximum rms current should be used. the rms current is given by : table 2. suggested inductors for typical application circuit component supplier series dimensions (mm) taiyo yuden NR10050 10 x 9.8 x 5 tdk slf12565 12.5 x 12.5 x 6.5 the output ripple, v out , is determined by : this formula has a maximum at v in = 2v out , where i rms = i out / 2. this simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. choose a capacitor rated at a higher temperature than required. several capacitors may also be paralleled to meet size or height requirements in the design. for the input capacitor, two 4.7 f low esr ceramic capacitors are recommended. for the recommended capacitor, please refer to table 3 for more detail. the selection of c out is determined by the required esr to minimize voltage ripple. moreover, the amount of bulk capacitance is also a key for c out selection to ensure that the control loop is stable. loop stability can be checked by viewing the load transient response as described in a later section.
rt2805a 12 ds2805a-00 november 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. figure 3. reference circuit with snubber and enable timing control thermal considerations for continuous operation, do not exceed the maximum operation junction temperature. the maximum power dissipation depends on the thermal resistance of ic package, pcb layout, the rate of surroundings airflow and temperature difference between junction to ambient. the maximum power dissipation can be calculated by following formula : p d(max) = (t j(max) ? t a ) / ja where t j(max) is the maximum operation junction temperature , t a is the ambient temperature and the ja is the junction to ambient thermal resistance. for recommended operating condition specifications, the maximum junction tempera ture is 125 c. the junction to ambient thermal resistance ja is layout dependent. for psop-8 package, the thermal resistance ja is 75 c /w on the standard jedec 51-7 four-layers thermal test board. the maximum power dissipation at t a = 25 c can be calculated by following formula : p d(max) = (125 c ? 25 c ) / (75 c /w) = 1.333w (min.copper area pcb layout) p d(max) = (125 c ? 25 c ) / (49 c /w) = 2.04w (70mm 2 copper area pcb layout) the thermal resistance ja of sop-8 (exposed pad) is determined by the package architecture design and the pcb layout design. however, the package architecture design had been designed. if possible, it's useful to increase thermal performance by the pcb layout copper design. the thermal resistance ja can be decreased by adding copper area under the exposed pad of sop-8 (ex posed pad) package. as shown in figure 4, the amount of copper area to which the sop-8 (exposed pad) is mounted affects thermal performance. when mounted to the standard sop-8 (exposed pad) pad (figure 4a), ja is 75 c/w. adding copper area of pad under the sop-8 (exposed pad) (figure 4.b) reduces the ja to 64 c/w. even further, increasing the copper area of pad to 70mm 2 (figure 4.e) reduces the ja to 49 c/w. the maximum power dissipation depends on the operating ambient temperature for fixed t j(max) and thermal resistance, ja . the derating curve in figure 5 of derating curves allows the designer to see the effect of rising ambient temperature on the maximum power dissipation allowed. emi consideration since parasitic inductance and capacitance effects in pcb circuitry w ould cause a spike voltage on sw pin when high side mosfet is turned-on /off, this spike voltage on sw may impact on emi performance in the system. in order to enhance emi performance, there are two methods to suppress the spike voltage. one is to place an r-c snubber between sw and gnd and make them as close as possible to the sw pin (see figure 3). another method is to add a resistor in series with the bootstrap capacitor, c boot . but this method will decrease the driving capability to the high side mosfet. it is strongly recommended to reserve the r-c snubber during pcb layout for emi improvement. moreover, reducing the sw trace area and keeping the main power in a small loop will be helpful on emi performance. for detailed pcb layout guide, please refer to the section of layout consideration. vin en gnd boot fb sw 5 4 7 8 1 l 10h 10nf r1 10k r2 3.16k v out 5v/5a 4.7f x 2 v in 5.5v to 32v rt2805a d b550c 6, 9 (exposed pad) c boot c out c in r boot * r s * c s * r en * c en * * : optional 47fx2 (poscap)
rt2805a 13 ds2805a-00 november 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. layout consideration follow the pcb layout guidelines for optimal performance of the rt2805a. ` keep the traces of the main current paths as short and wide as possible. ` put the input capacitor as close as possible to the device pins (vin and gnd). ` sw node is with high frequency voltage swing and should be kept at small area. keep analog components away from the sw node to prevent stray capacitive noise pick- up. ` connect feedback network behind the output capacitors. keep the loop area small. place the feedback components near the rt2805a. ` connect all analog grounds to a common node and then connect the common node to the power ground behind the output capacitors. ` an example of pcb layout guide is shown in figure 6 for reference. (a) copper area = (2.3 x 2.3) mm 2 , ja = 75 c/w (b) copper area = 10mm 2 , ja = 64 c/w (c) copper area = 30mm 2 , ja = 54 c/w (d) copper area = 50mm 2 , ja = 51 c/w (e) copper area = 70mm 2 , ja = 49 c/w figure 4. thermal resistance vs. copper area layout design figure 5. derating curve of maximum power dissipation 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 0 25 50 75 100 125 ambient temperature (c) power dissipation (w) copper area 70mm 2 50mm 2 30mm 2 10mm 2 min.layout four layer pcb
rt2805a 14 ds2805a-00 november 2012 www.richtek.com ? copyright 2012 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. figure 6. pcb layout guide table 3. suggested capacitors for c in and c out location component supplier part no. capacitance ( f) case size c in murata grm32er71h475k 4.7 1206 c in taiyo yuden umk325bj475mm-t 4.7 1206 c out murata grm31cr60j476m 47 1206 c out tdk c3225x5r0j476m 47 1210 c out murata grm32er71c226m 22 1210 c out tdk c3225x5r1c22m 22 1210 table 4. suggested diode component supplier series v rrm (v) i out (a) package diodes b550c 50 5 smc panjit sk 55 50 5 smc boot nc nc fb sw vin en gnd gnd 2 3 4 5 6 7 8 9 c in v out gnd v out r1 r2 sw c boot d1 the feedback components should be connected as close to the device as possible. sw should be connecte d to inductor by wide and short trace. keep sensitive components away from this trace. l1 c out c in c out input capacitor should be placed as close to the ic as possible.
rt2805a 15 ds2805a-00 november 2012 www.richtek.com richtek technology corporation 5f, no. 20, taiyuen street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 richtek products are sold by description only. richtek reserves the right to change the circuitry and/or specifications without notice at any time. customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a richtek product. information furnish ed by richtek is believed to be accurate and reliable. however, no responsibility is assumed by richtek or its subsidiaries for its use; nor for any infringeme nts of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of r ichtek or its subsidiaries. outline dimension a b j f h m c d i y x exposed thermal pad (bottom of package) 8-lead sop (exposed pad) plastic package dimensions in millimeters dimensions in inches symbol min max min max a 4.801 5.004 0.189 0.197 b 3.810 4.000 0.150 0.157 c 1.346 1.753 0.053 0.069 d 0.330 0.510 0.013 0.020 f 1.194 1.346 0.047 0.053 h 0.170 0.254 0.007 0.010 i 0.000 0.152 0.000 0.006 j 5.791 6.200 0.228 0.244 m 0.406 1.270 0.016 0.050 x 2.000 2.300 0.079 0.091 option 1 y 2.000 2.300 0.079 0.091 x 2.100 2.500 0.083 0.098 option 2 y 3.000 3.500 0.118 0.138

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